1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit controlling the output impedance and slew rate.
2. Description of the Related Art
In the fields of semiconductor integrated circuit, as techniques related to output impedance adjustment or slew rate adjustment, the following techniques have been known.
Japanese Patent Laid-Open No. 2004-32721 has disclosed a method of producing a control signal used for impedance matching. According to this conventional art, a replica circuit of a circuit to be impedance-matched having a plurality of MOSFETs connected in parallel is connected in series to an external reference resistor; and a voltage at a connection point therebetween is compared to a reference voltage. An impedance control circuit generates, based on the comparison result, a control signal determining the number of MOSFETs to be turned on in the replica circuit so that the above two voltages agree with each other. This control signal is supplied to the replica circuit, and is also supplied to the circuit to be impedance-matched to control the MOSFETs.
Japanese Patent Laid-Open No. 2002-26712 has disclosed a slew rate control circuit to adjust a slew rate. According to this conventional art, the slew rate is automatically set by use of an external reference resistor, irrespective of process states and environmental conditions. More specifically, the slew rate control circuit determines the operating current of a pre-buffer section based on a current value set by the external reference resistor. As a result, the slope of waveform inputted to a main buffer section becomes constant, irrespective of process states and environmental conditions; thus, the slew rate of the output buffer circuit is controlled.
Japanese Patent Laid-Open No. 2003-188705 has disclosed an output buffer circuit in which the output impedance can be switched according to a control signal from the outside. Also, while the output buffer circuit is mounted in a system, variations of cross point and slew rate due to variations of ambient environment can be substantially compensated for. The output buffer circuit includes a main buffer section and a pre-buffer section. More specifically, the main buffer section includes a plurality of MOSFETs; and the output impedance is switched by varying, according to a control signal from the outside, the number of MOSFETs driving a load. The pre-buffer section varies the drivability according to a control signal from the outside to thereby control the slew rate. That is, the output buffer circuit compensates for the slew rate according to the output impedance set by a signal from the outside.
Japanese Patent Laid-Open No. 2004-327602 has disclosed a technique of adjusting impedance and slew rate separately. A semiconductor integrated circuit device according to this conventional art includes an output circuit, first control means, and second control means. The output circuit includes a plurality of output MOSFETs connected in parallel. The first control means selects one to be turned on from among the plurality of output MOSFETs based on an impedance control code. The second control means regulates based on a slew rate control code, a drive signal of the output MOSFET to be turned on. The impedance control code is separated from the slew rate control code; thus, impedance and slew rate can be set separately while these do not affect each other.
The output impedance or slew rate of an output buffer may vary for each chip due to manufacturing variations. Also, the output impedance or slew rate may fluctuate due to fluctuations of operating environment such as power source voltage and temperature. These variations and fluctuations may cause a malfunction of the semiconductor integrated circuit. For example, when the slew rate is excessively high, noises such as overshoot or ringing become large, causing a malfunction of the semiconductor integrated circuit. In order to reduce such noises, the slew rate can be reduced by increasing the output impedance. In this case, however, the amplitude of output pulse may not be sufficiently large, resulting in outputting of erroneous data.
Thus, there is desired a technique by which the output impedance can be maintained at a desired value and at the same time the slew rate can also be controlled at a desired range. That is, there is desired a technique by which both the output impedance and slew rate can be controlled at a constant value. Here, according to the technique described in the above Japanese Patent Laid-Open No. 2004-327602, impedance control and slew rate control are performed separately and thus it is needed to prepare separate control means and separate control codes. This increases the area of circuit and complicates the control.